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tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 1 the lumenology company copyright 2012, taos inc. www.taosinc.com features 30 more sensitive than the tsl2560/61 device approximates human eye response programmable als interrupt function with user-defined upper and lower threshold settings 16-bit digital output with i 2 c fast-mode at 400 khz programmable analog gain and integration time supporting 1,000,000-to-1 dynamic range available in ultra-small 1.25 mm 1.75 mm chipscale package and small 2 mm 2 mm flat no-lead package automatically rejects 50/60-hz lighting ripple low quiescent current 3 a in power down mode rohs compliant applications ambient light sensor (als) for display brightness control end products and market segments hdtvs laptops and tablets mobile handsets monitors description the tsl2581 and TSL2583 are very-high sensitivity light-to-digital converters that transform light intensity to a digital signal output capable of direct i 2 c interface. each device combines one broadband photodiode (visible plus infrared) and one infrared-responding photodiode on a single cmos integrated circuit capable of providing a near-photopic response over an effective 16-bit dynamic range (16-bit resolution). two integrating adcs convert the photodiode currents to a digital output that represents the irradiance measured on each channel. this digital output can be input to a microprocessor where illuminance (ambient light level) in lux is derived using an empirical formula to approximate the human eye response. the tsl2581 device supports a traditional level style interrupt that remains asserted until the firmware clears it. while useful for general purpose light sensing applications, the tsl2581/83 devices are designed particularly for displays (lcd, oled, etc.) with the purpose of extending battery life and providing optimum viewing in diverse lighting conditions. display panel backlighting, which can account for up to 50 to 60 percent of total platform power, can be automatically managed. both devices are also ideal for controlling keyboard illumination based upon ambient lighting conditions. illuminance information can further be used to manage exposure control in digital cameras. the tsl2581/83 devices are ideal in notebook/tablet pcs, lcd monitors, flat-panel televisions, cell phones, and digital cameras. in addition, other applications include street light control, security lighting, sunlight harvesting, machine vision, and automotive instrumentation clusters. texas advanced optoelectronic solutions inc. 1001 klein road suite 300 plano, tx 75074 (972) 673-0759 package cs 6-lead chipscale (top view) v dd 1 addr sel 2 gnd 3 6 sda 5 int 4 scl package drawings are not to scale package fn dual flat no-lead (top view) 6 sda 5 int 4 scl v dd 1 addr sel 2 gnd 3 ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 2 copyright 2012, taos inc. the lumenology company www.taosinc.com functional block diagram two-wire serial interface address select interrupt sda v dd channel 0 visible and ir channel 1 ir only command register adc register int scl addr sel integrating a/d converter detailed description the tsl2581 and TSL2583 are second-generation ambient light sensor devices. each contains two integrating analog-to-digital converters (adc) that integrate currents from two photodiodes. integration of both channels occurs simultaneously. upon completion of the conversion cycle, the conversion result is transferred to the channel 0 and channel 1 data registers, respectively. the transfers are double-buffered to ensure that the integrity of the data is maintained. after the transfer, the device automatically begins the next integration cycle. communication to the device is accomplished through a standard, two-wire i 2 c serial bus. consequently, the tsl258x device can be easily connected to a microcontroller or embedded controller. no external circuitry is required for signal conditioning, thereby saving pcb real estate as well. because the output of the tsl258x device is digital, the output is effectively immune to noise when compared to an analog signal. the tsl258x devices also support an interrupt feature that simplifies and improves system efficiency by eliminating the need to poll a sensor for a light intensity value. the primary purpose of the interrupt function is to detect a meaningful change in light intensity . the concept of a meaningful change can be defined by the user both in terms of light intensity and time, or persistence, of that change in intensity. the tsl258x devices have the ability to define a threshold above and below the current light level. an interrupt is generated when the value of a conversion exceeds either of these limits. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 3 the lumenology company copyright 2012, taos inc. www.taosinc.com terminal functions terminal type description name no. type description addr sel 2 i address select ? three-state. gnd 3 power supply ground. all voltages are referenced to gnd. int 5 o interrupt ? open drain. scl 4 i serial clock input terminal ? clock signal. sda 6 i/o serial data i/o terminal ? serial data i/o. v dd 1 supply voltage. available options device package ? leads interface type ordering number tsl2581 cs?6 i 2 c bus = v dd tsl2581cs tsl2581 fn?6 i 2 c bus = v dd tsl2581fn TSL2583 ? cs?6 i 2 c bus = 1.8 v TSL2583cs TSL2583 fn?6 i 2 c bus = 1.8 v TSL2583fn ? contact taos for availability. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage, v dd (see note 1) 3.8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital output voltage range, v o ?0.5 v to 3.8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital output current, i o ?1 ma to 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?40 c to 85 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . esd tolerance, human body model 2000 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditions? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: all voltages are with respect to gnd. recommended operating conditions min nom max unit supply voltage, v dd 2.7 3 3.6 v operating free-air temperature, t a ?30 70 c scl sda input low voltage v tsl2581 (note 2) 0.3 v dd v scl, sda input low voltage, v il TSL2583 (note 3) 0.54 v scl sda input high voltage v tsl2581 (note 2) 0.7 v dd v scl, sda input high voltage, v ih TSL2583 (note 3) 1.25 v notes: 2. meets i 2 c specifications where v bus = v dd . 3. meets i 2 c specifications where v bus = 1.8 v. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 4 copyright 2012, taos inc. the lumenology company www.taosinc.com electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions min typ max unit i supply current active 175 250 a i dd supply current power down ? i 2 c activity 3 10 a v int sda output low voltage 3 ma sink current 0 0.4 v v ol int, sda output low voltage 6 ma sink current 0 0.6 v i leak leakage current ?5 5 a operating characteristics, v dd = 3 v, t a = 25 c, (unless otherwise noted) (notes 1, 2, 3, and 4) parameter test conditions channel min typ max unit f osc oscillator frequency 705 750 795 khz dark adc count value e e = 0, atime = 0xb6 (200 ms), ch0 0 1 5 counts dark adc count value e e = 0 , atime = 0xb6 (200 ms) , gain = 16 ch1 0 1 5 counts atime 0xdb (100 ms) ch0 37887 full scale adc count value atime = 0xdb (100 ms) ch1 37887 counts full scale adc count value atime 0x6c (400 ms) ch0 65535 counts atime = 0x6c (400 ms) ch1 65535 p = 625 nm, atime = 0xf6 (27 ms) ch0 4000 5000 6000 adc count value p = 625 nm , atime = 0xf6 (27 ms) e e = 171.6 w/cm 2 , gain = 16 ch1 700 counts adc count value p = 850 nm, atime = 0xf6 (27 ms) ch0 4000 5000 6000 counts p = 850 nm , atime = 0xf6 (27 ms) e e = 220 w/cm 2 , gain = 16 ch1 2750 625 nm 10 8 15 8 20 8 adc count value ratio: ch1/ch0 p = 625 nm 10.8 15.8 20.8 % adc count value ratio: ch1/ch0 850 nm 41 55 68 % adc count value ratio: ch1/ch0 p = 850 nm 41 55 68 % 625 nm atime 0xf6 (27 ms) ch0 29.1 r irradiance responsivity p = 625 nm, atime = 0xf6 (27 ms) ch1 4 counts/ ( w/ r e irradiance responsivity 850 nm atime 0xf6 (27 ms) ch0 22.8 ( w/ c m 2 ) p = 850 nm, atime = 0xf6 (27 ms) ch1 12.5 cm 2 ) 8 ch0 7 8 9 8 ch1 7 8 9 gain scaling (relative to 1 ) 16 ch0 15 16 17 gain scaling (relative to 1 ) 16 ch1 15 16 17 111 , decouplin g capacitor 25 mm ch0 97 107 115 111 , decoupling capacitor 25 mm from v dd pin (note 5) ch1 100 115 125 notes: 1. optical measurements are made using small-angle incident radiation from light-emitting diode optical sources. visible 640 nm leds and infrared 850 nm leds are used for final product testing for compatibility with high-volume production. 2. the 625 nm irradiance e e is supplied by an ali ngap light-emitting diode with the following characteristics: peak wavelength p = 625 nm and spectral halfwidth ? ? = 20 nm. 3. the 850 nm irradiance e e is supplied by a light-emitting diode with the following characteristics: peak wavelength p = 850 nm and spectral halfwidth ? ? = 42 nm. 4. the integration time t int , is dependent on internal oscillator frequency (f osc ) and on the number of integration cycles (atime) in the timing register (0xff) as described in the register section. for nominal f osc = 750 khz, nominal t int = 2.7 ms atime. 5. 111 gain is affected by the line inductance between the v dd pin and the decoupling capacitor. see figure 3 for 111 gain scale versus line inductance characteristic. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 5 the lumenology company copyright 2012, taos inc. www.taosinc.com ac electrical characteristics, v dd = 3 v, t a = 25 c (unless otherwise noted) parameter ? test conditions min typ max unit t (conv) conversion time 2.7 688 ms f (scl) clock frequency 0 400 khz t (buf) bus free time between start and stop condition 1.3 s t (hdsta) hold time after (repeated) start condition. after this period, the first clock is generated. 0.6 s t (susta) repeated start condition setup time 0.6 s t (susto) stop condition setup time 0.6 s t (hddat) data hold time 0 0.9 s t (sudat) data setup time 100 ns t (low) scl clock low period 1.3 s t (high) scl clock high period 0.6 s t f clock/data fall time 300 ns t r clock/data rise time 300 ns c i input pin capacitance 10 pf ? specified by design and characterization; not production tested. parameter measurement information sda scl stop start scl ack t (lowmext) t (lowmext) t (lowsext) scl ack t (lowmext) start condition stop condition p sda t (susto) t (sudat) t (hddat) t (buf) v ih v il scl t (susta) t (high) t (f) t (r) t (hdsta) t (low) v ih v il ps s figure 1. timing diagrams ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 6 copyright 2012, taos inc. the lumenology company www.taosinc.com typical characteristics figure 2 spectral responsivity ? wavelength ? nm 0 400 0.2 0.4 0.6 0.8 1 500 600 700 800 900 1000 1100 normalized responsivity 300 ch 0 ch 1 figure 3 111 gain scale vs. line inductance high gain mode scale ? 0 5 10 15 20 106 110 114 118 122 126 130 distance to capacitor ? mm 0 5 10 15 line inductance ? nh ch 0 ch 1 figure 4 normalized responsivity vs. angular displacement ? angular displacement ? normalized responsivity 0 0.2 0.4 0.6 0.8 1.0 ?90 ?60 ?30 0 30 60 90 ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 7 the lumenology company copyright 2012, taos inc. www.taosinc.com principles of operation analog-to-digital converter the tsl258x contains two integrating analog-to-digital converters (adc) that integrate the currents from the channel 0 and channel 1 photodiodes. integration of both channels occurs simultaneously, and upon completion of the conversion cycle the conversion result is transferred to the channel 0 and channel 1 data registers, respectively. the transfers are double buffered to ensure that invalid data is not read during the transfer. after the transfer, the device automatically begins the next integration cycle. digital interface interface and control of the tsl258x is accomplished through a two-wire serial interface to a set of registers that provide access to device control functions and output data. the serial interface is compatible with i 2 c bus fast-mode. the tsl258x offers three slave addresses that are selectable via an external pin (addr sel). the slave address options are shown in table 1. table 1. slave address selection addr sel terminal level slave address gnd 0101001 float 0111001 v dd 1001001 note: a read/write bit should be appended to the slave address by the master device to properly communicate with the tsl258x dev ice. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 8 copyright 2012, taos inc. the lumenology company www.taosinc.com i 2 c protocol interface and control are accomplished through an i 2 c serial compatible interface (standard or fast mode) to a set of registers that provide access to device control functions and output data. the devices support the 7-bit i 2 c addressing protocol. the i 2 c standard provides for three types of bus transaction: read, write, and a combined protocol (figure 5). during a write operation, the first byte written is a command byte followed by data. in a combined protocol, the first byte written is the command byte followed by reading a series of bytes. if a read command is issued, the register address from the previous command will be used for data access. likewise, if the msb of the command is not set, the device will write a series of bytes at the address stored in the last valid command with a register address. the command byte contains either control information or a 5-bit register address. the control commands can also be used to clear interrupts. the i 2 c bus protocol was developed by philips (now nxp). for a complete description of the i 2 c protocol, please review the nxp i 2 c design specificati on at http ://www.i2c?bus.org/references/. a acknowledge (0) n not acknowledged (1) p stop condition r read (1) s start condition sr repeated start condition w write (0) ... continuation of protocol master-to-slave slave-to-master w 7 data byte slave address s 1 aa a 8 11 1 8 command code 1 p 1 ... i 2 c write protocol i 2 c read protocol i 2 c read protocol ? combined format r 7 data slave address s 1 aa a 8 11 1 8 data 1 p 1 ... w 7 slave address slave address s 1 ar a 8 11 1 7 11 command code sr 1 a data a a 81 8 data 1 p 1 ... figure 5. i 2 c protocols ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 9 the lumenology company copyright 2012, taos inc. www.taosinc.com register set the tsl258x is controlled and monitored by sixteen registers and a command register accessed through the serial interface. these registers provide for a variety of control functions and can be read to determine results of the adc conversions. the register set is summarized in table 2. table 2. register address address resister name register function r/w ?? command specifies register address w 00h control control of basic functions 01h timing integration time/gain control 02h interrupt interrupt control 03h tllow low byte of low interrupt threshold r/w 04h tlhigh high byte of low interrupt threshold r/w 05h thlow low byte of high interrupt threshold 06h thhigh high byte of high interrupt threshold 07h analog analog control register 12h id part number / rev id 14h data0low adc channel 0 low data register 15h data0high adc channel 0 high data register 16h data1low adc channel 1 low data register r 17h data1high adc channel 1 high data register r 18h timerlow manual integration timer low register 19h timerhigh manual integration timer high register 1eh id2 tsl2581 / TSL2583 id r/w the mechanics of accessing a specific register is given in the i 2 c protocol section. in general, the command register is written first to specify the specific control/status register for following read/write operations. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 10 copyright 2012, taos inc. the lumenology company www.taosinc.com command register the command register specifies the address of the target register for subsequent read and write operations and contains eight bits as described in table 3. the command register defaults to 00h at power on. table 3. command register 6 754 address 2 310 cmd transaction reset 00h bit : field bit description cmd 7 select command register. must write as 1 when addressing command register. select type of transaction to follow in subsequent data transfers: field value description 00 repeated byte protocol transaction transaction 6:5 01 auto-increment protocol transaction transaction 6 : 5 10 reserved ? do not use 11 special function ? see description below transaction type 00 will repeatedly read the same register with each data access. transaction type 01 will provide an auto?increment function to read successive register bytes. address field/special function field. depending on the transaction type, see above, this field either specifies a special function command or selects the specific control-status-register for following write and read transactions. the field values listed below apply only to special function commands: field value description 00000 reserved. write as 0000b. address 40 00001 clear any pending interrupt and is a write?once?to?clear bit address 4:0 00010 when the timing register is set to 00h, a sendbyte command with the address field set to 0010b will stop a manual integration. the actual length of the integration cycle may be read in the manual integration timer register. 00011 when the timing register is set to 00h, a sendbyte command with the address field set to 0011b will start a manual integration. the actual length of the integration cycle may be read in the manual integration timer register. x11xx reserved. write as 11xxb. note: an i 2 c block transaction will continue until the master sends a stop condition. only the send byte protocol should be used when clearing interrupts. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 11 the lumenology company copyright 2012, taos inc. www.taosinc.com control register (00h) the control register primarily used to power the tsl258x device up and down as shown in table 4. table 4. control register 6 754 power 2 310 reserved resv adc_valid reserved adc_en adc_intr address 00h reset 00h bit : field bit description reserved 7:6 reserved. write as 0. adc_intr 5 adc interrupt. read only. indicates that the device is asserting an interrupt. adc_valid 4 adc valid. read only. indicates that the adc channel has completed an integration cycle. reserved 3:2 reserved. write as 0. adc_en 1 adc enable. this field enables the two adc channels to begin integration. writing a 1 activates the adc channels, and writing a 0 disables the adcs. power 0 power on. writing a 1 powers on the device, and writing a 0 turns it off. note: adc_en and power must be asserted before the adc changes will operate correctly. after power is asserted, a 2-ms delay is required before asserting adc_en. note: the tsl258x device registers should be configured before adc_en is asserted. timing register (01h) the timing register controls the internal integration time of the adc channels in 2.7-ms increments. the timing register defaults to 00h at power on. table 5. timing register 6 7542 310 atime address 01h reset 00h bit : field bit description integration cycles. specifies the integration time in 2.7-ms intervals. time is expressed as a 2?s complement number. so, to quickly work out the correct value to write: (1) determine the number of 2.7-ms intervals required, and (2) then take the 2?s complement. for example, for a 1 2.7-ms interval, 0xff should be written. for 2 2.7-ms intervals, 0xfe should be written. the maximum integration time is 688.5 ms (00000001b). writing a 0x00 to this register is a special case and indicates manual timing mode. see control and manual integration timer registers for other device options related to manual integration. integ_cycles time value atime 7:0 ? manual integration 00000000 atime 7: 0 1 2.7 ms 11111111 2 5.4 ms 11111110 19 51.3 ms 11101101 37 99.9 ms 11011011 74 199.8 ms 10110110 148 399.6 ms 01101100 255 688.5 ms 00000001 note: the send byte protocol cannot be used when atime is greater than 127 (for example atime[7] = 1) since the upper bit is set aside for write transactions in the command register. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 12 copyright 2012, taos inc. the lumenology company www.taosinc.com interrupt register (02h) the interrupt register controls the extensive interrupt capabilities of the device. the open-drain interrupt pin is active low and requires a pull-up resistor to v bus in order to pull high in the inactive state. the interrupt register provides control over when a meaningful interrupt will occur. the concept of meaningful change can be defined by the user both in terms of light intensity and time, or persistence of that change in intensity. the value must cross the threshold (as configured in the threshold registers 03h through 06h) and persist for some period of time, as outlined in table 8. when a level interrupt is selected, an interrupt is generated whenever the last conversion results in a value outside of the programmed threshold window. the interrupt is active-low and remains asserted until cleared by writing an 11 in the transaction field in the command register. note: interrupts are based on the value of channel 0 only. table 6. interrupt control register 6 7542 310 intr_stop resv resv persist address 02h reset 00h bit : intr field bits description resv 7 reserved. write as 0. intr_stop 6 stop adc integration on interrupt. when high, adc integration will stop once an interrupt is asserted. to resume operation (1) de-assert adc_en using control register, (2) clear interrupt using command register, and (3) re-assert adc_en using control register. note : use this bit to isolate a particular condition when the sensor is continuously integrating. resv 5 reserved. write as 0. intr 4 intr control select. this field determines mode of interrupt logic according to table 7, below. persist 3:0 interrupt persistence. controls rate of interrupts to the host processor as shown in table 8, below. table 7. interrupt control select intr field value read value 0 interrupt output disabled 1 level interrupt ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 13 the lumenology company copyright 2012, taos inc. www.taosinc.com table 8. interrupt persistence select persist field value interrupt persist function 0000 every adc cycle generates interrupt 0001 any value outside of threshold range 0010 2 integration time periods out of range 0011 3 integration time periods out of range 0100 4 integration time periods out of range 0101 5 integration time periods out of range 0110 6 integration time periods out of range 0111 7 integration time periods out of range 1000 8 integration time periods out of range 1001 9 integration time periods out of range 1010 10 integration time periods out of range 1011 11 integration time periods out of range 1100 12 integration time periods out of range 1101 13 integration time periods out of range 1110 14 integration time periods out of range 1111 15 integration time periods out of range ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 14 copyright 2012, taos inc. the lumenology company www.taosinc.com interrupt threshold registers (03h ? 06h) the interrupt threshold registers store the values to be used as the high and low trigger points for the comparison function for interrupt generation. if the value generated by channel 0 crosses below or is equal to the low threshold specified, an interrupt is asserted on the interrupt pin. if the value generated by channel 0 crosses above the high threshold specified, an interrupt is asserted on the interrupt pin. registers tllow and tlhigh provide the low byte and high byte, respectively, of the lower interrupt threshold. registers thlow and thhigh provide the low and high bytes, respectively, of the upper interrupt threshold. the high and low bytes from each set of registers are combined to form a 16-bit threshold value. the interrupt threshold registers default to 00h on power up. table 9. interrupt threshold registers register address bits description tllow 3h 7:0 adc channel 0 lower byte of the low threshold tlhigh 4h 7:0 adc channel 0 upper byte of the low threshold thlow 5h 7:0 adc channel 0 lower byte of the high threshold thhigh 6h 7:0 adc channel 0 upper byte of the high threshold note: since two 8-bit values are combined for a single 16-bit value for each of the high and low interrupt thresholds, the send byte protocol should not be used to write to these registers. any values transferred by the send byte protocol with the msb set would be interpreted as the command field and stored as an address for subsequent read/write operations and not as the interrupt threshold information as desired. the write word protocol should be used to write byte-paired registers. for example, the tllow and tlhigh registers (as well as the thlow and thhigh registers) can be written together to set the 16-bit adc value in a single transaction. analog register (07h) the analog register provides eight bits of control to the analog block. these bits control the analog gain settings of the device. table 10. analog register 6 7542 310 resv gain address 07h reset 00h bit : field bits description resv 7:3 reserved. write as 0. gain control. sets the analog gain of the device according to the following table. field value gain value gain 2:0 x00 1 gain 2:0 x01 8 x10 16 x11 111 ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 15 the lumenology company copyright 2012, taos inc. www.taosinc.com id register (12h) the id register provides the value for both the part number and silicon revision number for that part number. it is a read-only register whose value never changes. table 11. id register 6 754 revno 2 310 partno address 12h reset ? ? bit : field bits description partno 7:4 part number identification: field value 1001b revno 3:0 revision number identification adc channel data registers (14h ? 17h) the adc channel data are expressed as 16-bit values spread across two registers. the adc channel 0 data registers, data0low and data0high provide the lower and upper bytes, respectively, of the adc value of channel 0. registers data1low and data1high provi de the lower and upper bytes, respectively, of the adc value of channel 1. all channel data registers are read-only and default to 00h on power up. table 12. adc channel data registers register address bits description data0low 14h 7:0 adc channel 0 lower byte data0high 15h 7:0 adc channel 0 upper byte data1low 16h 7:0 adc channel 1 lower byte data1high 17h 7:0 adc channel 1 upper byte the upper byte data registers can only be read following a read to the corresponding lower byte register. when the lower byte register is read, the upper eight bits are strobed into a shadow register, which is read by a subsequent read to the upper byte. the upper register will read the correct value even if additional adc integration cycles end between the reading of the lower and upper registers. note: the read w ord protocol can be used to read byte-paired registers. for example, the data0low and data0high registers (as well as the data1low and data1high registers) may be read together to obtain the 16-bit adc value in a single transaction manual integration timer registers (18h ? 19h) the manual integration timer registers provide the number of cycles in 10.9 s increments that occurred during a manual start/stop integration period. the timer is expressed as a 16-bit value across two registers. see control and timing registers for further instructions in configuring a manual integration. the maximum time that can be derived without an overflow is 714.3 ms. table 13. manual integration timer registers 6 7542 310 timer address 18h 19h reset 00h bit : register address bits description timerlow 18h 7:0 manual integration timer lower byte timerhigh 19h 7:0 manual integration timer upper byte ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 16 copyright 2012, taos inc. the lumenology company www.taosinc.com id2 register (1eh) in combination with the id register, the id2 register provides a means to identify the device as a tsl2581 or a TSL2583. although this is a w/r register, it is strongly advised that this register not be written to. any value written to this register could adversely affect the performance of the device. table 14. id2 register 6 7542 310 reserved id reserved address 00h reset 00h bit : field bit description reserved 7:6 reserved. id 5:4 id. 00b = tsl2581, 11b = TSL2583 reserved 3:0 reserved. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 17 the lumenology company copyright 2012, taos inc. www.taosinc.com application information: software basic operation after applying v dd , the device will initially be in the power-down state. to operate the device, issue a command to access the control register followed by the data value 01h to the control register to power up the device. the timing register should be configured for the preferred integration period, and then the adc_en should be set to 1 to enable both adc channels. for example code that illustrates initializing and reading the device, see taos designer?s notebook number 42: tsl258x: accurate adc readings after enable. (adc_en = 1 power =1) ext pwr power down no yes active (adc_en = 0 power = 1) als (power = 0) figure 6. state diagram ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 18 copyright 2012, taos inc. the lumenology company www.taosinc.com application information: software interrupts the interrupt feature of the tsl258x device simplifies and improves system efficiency by eliminating the need to poll the sensor for a light intensity value. interrupt mode is determined by the intr field in the interrupt control register. the interrupt feature may be disabled by writing a field value of 00h to the interrupt control register (02h) so that polling can be performed. the versatility of the interrupt feature provides many options for interrupt configuration and usage. the primary purpose of the interrupt function is to signal a meaningful change in light intensity. however, it can also be used as an end-of-conversion signal. the concept of a meaningful change can be defined by the user both in terms of light intensity and time, or persistence, of that change in intensity. the tsl258x device implements two 16-bit-wide interrupt threshold registers that allow the user to define thresholds above and below a desired light level. an interrupt will then be generated when the value of a conversion exceeds either of these limits. for simplicity of programming, the threshold comparison is accomplished only with channel 0. this simplifies calculation of thresholds that are based, for example, on a percent of the current light level. it is adequate to use only one channel when calculating light intensity dif ferences because, for a given light source, the channel 0 and channel 1 values are linearly proportional to each other and thus both values scale linearly with light intensity. to further control when an interrupt occurs, the tsl258x device provides an interrupt persistence feature. this feature allows the user to specify a number of conversion cycles for which a light intensity exceeding either interrupt threshold must persist before actually generating an interrupt. this can be used to prevent transient changes in light intensity from generating an unwanted interrupt. with a value of 1, an interrupt occurs immediately whenever either threshold is exceeded. with values of n , where n can range from 2 to 15, n consecutive conversions must result in values outside the interrupt window for an interrupt to be generated. for example, if n is equal to 10 and the integration time is 402 ms, then an interrupt will not be generated unless the light level persists for more than 4 seconds outside the threshold. the interrupt line goes active low and remains low until the interrupt is cleared by selecting the special function in the command register and writing a 0 to the interrupt clear field value. to configure the interrupt as an end-of-conversion signal so that every adc integration cycle generates an interrupt, t he interrupt persist field in the interrupt control register (02h) is set to 0000b. an interrupt will be generated upon completion of each conversion. the interrupt threshold registers are ignored. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 19 the lumenology company copyright 2012, taos inc. www.taosinc.com application information: software system considerations there are three system design considerations to take into account when using this device: the initial channel 0 and channel 1 adc values (14h~17h) after adc_en is asserted should be discarded because the first adc values are affected by transients associated with the power up of the analog circuitry. it is recommended that the adc_en be disabled before changing the analog gain (gain) in the analog register (07h) because the change will affect the integration in progress, yielding an indeterminate result. the integration time (itime) in the timing register (01h) can be changed at any time; however, the change will take effect only upon completion of the current als cycle. regarding the first design consideration, there are several ways that the initial adc values can be discarded. one option is to use the interrupt persistence (persist) in the interrupt control register (02h) equal to 2 (0010b), such that an interrupt is generated after the second adc cycle when the values are valid. to ensure an interrupt, the interrupt high and low threshold registers (03h~06h) can both be set to 0, which is the default value. once the interrupt occurs, the interrupt thresholds and persist can be modified as desired. to ensure the shortest time in the initial adc cycle, another option is to set itime to the minimum, assert adc_en, and then change itime to the preferred integration time. clear the first interrupt produced by the minimum integration time cycle so subsequent interrupts are the result of the modified integration time. for example code that satisfies the system considerations listed above, see taos designer?s notebook number 42: tsl258x: accurate adc readings after enable. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 20 copyright 2012, taos inc. the lumenology company www.taosinc.com application information: software calculating lux the tsl258x is intended for use in ambient light detection applications such as display backlight control, where adjustments are made to display brightness or contrast based on the brightness of the ambient light, as perceived by the human eye. conventional silicon detectors respond strongly to infrared light, which the human eye does not see. this can lead to significant error when the infrared content of the ambient light is high, such as with incandescent lighting, due to the difference between the silicon detector response and the brightness perceived by the human eye. this problem is overcome in the tsl258x through the use of two photodiodes. one of the photodiodes (channel 0) is sensitive to both visible and infrared light, while the second photodiode (channel 1) is sensitive primarily to infrared light. an integrating adc converts the photodiode currents to digital outputs. channel 1 digital output is used to compensate for the effect of the infrared component of light on the channel 0 digital output. the adc digital outputs from the two channels are used in a formula to obtain a value that approximates the human eye response in the commonly used illuminance unit of lux: chipscale package for ch1/ch0 = 0.00 to 0.25 lux = 0.105 ch0 ? 0.208 ch1 for ch1/ch0 = 0.25 to 0.38 lux = 0.1088 ch0 ? 0.2231 ch1 for ch1/ch0 = 0.38 to 0.45 lux = 0.0729 ch0 ? 0.1286 ch1 for ch1/ch0 = 0.45 to 0.60 lux = 0.060 ch0 ? 0.10 ch1 for ch1/ch0 > 0.60 lux/ch0 = 0 fn package for ch1/ch0 = 0.00 to 0.30 lux = 0.130 ch0 ? 0.240 ch1 for ch1/ch0 = 0.30 to 0.38 lux = 0.1649 ch0 ? 0.3562 ch1 for ch1/ch0 = 0.38 to 0.45 lux = 0.0974 ch0 ? 0.1786 ch1 for ch1/ch0 = 0.45 to 0.54 lux = 0.062 ch0 ? 0.100 ch1 for ch1/ch0 > 0.54 lux/ch0 = 0 the formulas shown above were obtained by optical testing with fluorescent and incandescent light sources, and apply only to open-air applications. optical apertures (e.g. light pipes) will affect the incident light on the device. simplified lux calculation below is the argument and return value including source code (shown on following page) for calculating lux with the TSL2583fn. the source code is intended for embedded and/or microcontroller applications. all floating point arithmetic operations have been eliminated since embedded controllers and microcontrollers generally do not support these types of operations. because floating point has been removed, scaling must be performed prior to calculating illuminance if the integration time is not 400 msec and/or if the gain is not 1 as denoted in the source code on the following pages. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 21 the lumenology company copyright 2012, taos inc. www.taosinc.com //**************************************************************************** // // copyright 2004?2008 taos, inc. // // this code and information is provided ?as is? without warranty of any // kind, either expressed or implied, including but not limited to the // implied warranties of merchantability and/or fitness for a particular // purpose. // // module name: // lux.cpp // //**************************************************************************** #define lux_scale 16 // scale by 2^16 #define ratio_scale 9 // scale ratio by 2^9 //??????????????????????????????????????????????????? // integration time scaling factors //??????????????????????????????????????????????????? #define ch_scale 16 // scale channel values by 2^16 #define nom_integ_cycle 148 // nominal 400 ms integration. see timing register //??????????????????????????????????????????????????? // gain scaling factors //??????????????????????????????????????????????????? #define ch0gain128x 107 // 128x gain scalar for ch0 #define ch1gain128x 115 // 128x gain scalar for ch1 //??????????????????????????????????????????????????? // fn package coefficients //??????????????????????????????????????????????????? // for ch1/ch0=0.00 to 0.30: // lux=0.130*ch0?0.240*ch1 // // for ch1/ch0=0.30 to 0.38: // lux=0.1649*ch0?0.3562*ch1 // // for ch1/ch0=0.38 to 0.45: // lux=0.0974*ch0?0.1786*ch1 // // for ch1/ch0=0.45 to 0.54: // lux=0.062*ch0?0.10*ch1 // // for ch1/ch0>0.54: // lux/ch0=0 // //??????????????????????????????????????????????????? #define k1c 0x009a // 0.30 * 2^ratio_scale #define b1c 0x2148 // 0.130 * 2^lux_scale #define m1c 0x3d71 // 0.240 * 2^lux_scale #define k2c 0x00c3 // 0.38 * 2^ratio_scale #define b2c 0x2a37 // 0.1649 * 2^lux_scale #define m2c 0x5b30 // 0.3562 * 2^lux_scale #define k3c 0x00e6 // 0.45 * 2^ratio_scale #define b3c 0x18ef // 0.0974 * 2^lux_scale #define m3c 0x2db9 // 0.1786 * 2^lux_scale #define k4c 0x0114 // 0.54 * 2^ratio_scale #define b4c 0x0fdf // 0.062 * 2^lux_scale #define m4c 0x199a // 0.10 * 2^lux_scale #define k5c 0x0114 // 0.54 * 2^ratio_scale #define b5c 0x0000 // 0.00000 * 2^lux_scale #define m5c 0x0000 // 0.00000 * 2^lux_scale ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 22 copyright 2012, taos inc. the lumenology company www.taosinc.com // lux equation approximation without floating point calculations ////////////////////////////////////////////////////////////////////////////// // routine: unsigned int calculatelux(unsigned int ch0, unsigned int ch0, int itype) // // description: calculate the approximate illuminance (lux) given the raw // channel values of the TSL2583. the equation if implemented // as a piece?wise linear approximation. // // arguments: unsigned int igain ? gain, where 0:1x, 1:8x, 2:16x, 3:128x // unsigned int tintcycles ? integ_cycles defined in timing register // unsigned int ch0 ? raw channel value from channel 0 of TSL2583 // unsigned int ch1 ? raw channel value from channel 1 of TSL2583 // unsigned int itype ? package type (1:cs) // // return: unsigned int ? the approximate illuminance (lux) // ////////////////////////////////////////////////////////////////////////////// unsigned int calculatelux(unsigned int igain, unsigned int tintcycles, unsigned int ch0, unsigned int ch1, int itype) { //???????????????????????????????????????????????????????????????????????? // first, scale the channel values depending on the gain and integration time // 1x, 400ms is nominal setting unsigned long chscale0; unsigned long chscale1; unsigned long channel1; unsigned long channel0; // no scaling if nominal integration (148 cycles or 400 ms) is used if (tintcycles == nom_integ_cycle) chscale0 = (1 << ch_scale); else chscale0 = (nom_integ_cycle << ch_scale) / tintcycles; switch (igain) { case 0: // 1x gain chscale1 = chscale0; // no scale. nominal setting break; case 1: // 8x gain chscale0 = chscale0 >> 3; // scale/multiply value by 1/8 chscale1 = chscale0; break; case 2: // 16x gain chscale0 = chscale0 >> 4; // scale/multiply value by 1/16 chscale1 = chscale0; break; case 3: // 128x gain chscale1 = chscale0 / ch1gain128x; //ch1 gain correction factor applied chscale0 = chscale0 / ch0gain128x; //ch0 gain correction factor applied break; } // scale the channel values channel0 = (ch0 * chscale0) >> ch_scale; channel1 = (ch1 * chscale1) >> ch_scale; //???????????????????????????????????????????????????????????????????????? // find the ratio of the channel values (channel1/channel0) // protect against divide by zero ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 23 the lumenology company copyright 2012, taos inc. www.taosinc.com unsigned long ratio1 = 0; if (channel0 != 0) ratio1 = (channel1 << (ratio_scale+1)) / channel0; // round the ratio value unsigned long ratio = (ratio1 + 1) >> 1; // is ratio <= eachbreak? unsigned int b, m; switch (itype) { case 1: // cs package if ((ratio >= 0) && (ratio <= k1c)) {b=b1c; m=m1c;} else if (ratio <= k2c) {b=b2c; m=m2c;} else if (ratio <= k3c) {b=b3c; m=m3c;} else if (ratio <= k4c) {b=b4c; m=m4c;} else if (ratio > k5c) {b=b5c; m=m5c;} break; } unsigned long temp; unsigned long lux; temp = ((channel0 * b) ? (channel1 * m)); // round lsb (2^(lux_scale?1)) temp += (1 << (lux_scale?1)); // strip off fractional portion lux = temp >> lux_scale; return(lux); } ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 24 copyright 2012, taos inc. the lumenology company www.taosinc.com application information: hardware power supply decoupling and application hardware circuit the power supply lines must be decoupled with a 0.1 f capacitor placed as close to the device package as possible (figure 7). the bypass capacitor should have low ef fective series resistance (esr) and low effective series inductance (esi), such as the common ceramic types, which provide a low impedance path to ground at high frequencies to handle transient currents caused by internal logic switching. figure 3 shows how the 111 gain is impacted by the line inductance between the v dd pin and the decoupling capacitor. tsl2581/ TSL2583 v bus v dd 0.1 f r p r p scl sda r pi int figure 7. bus pull-up resistors pull-up resistors (r p ) maintain the scl and sda lines at a high level when the bus is free and ensure the signals are pulled up from a low to a high level within the required rise time. the i 2 c bus protocol was developed by philips (now nxp). the pull-up resistor (r p ) value is a function of the i 2 c bus speed, the supply voltage, and the capacitive bus loading. users should consult the nxp i 2 c design specification (http://www.i2c?bus.org/references/) for assistance. with a lightly loaded bus running at 400 kbps and v bus = 3 v, 1.5 k resistors have been found to be viable. a pull-up resistor (r pi ) is also required for the interrupt (int), which functions as a wired-and signal in a similar fashion to the scl and sda lines. a typical impedance value between 10 k and 100 k can be used. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 25 the lumenology company copyright 2012, taos inc. www.taosinc.com application information: hardware pcb pad layouts suggested pcb pad layout guidelines for t he cs chipscale package are shown in figure 8. 0.50 6 0.21 0.50 0.50 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. figure 8. suggested cs package pcb layout suggested pcb pad layout guidelines for the dual flat no-lead (fn) surface mount package are shown in figure 9. 0.40 2.3 0.40 0.9 1.70 0.65 0.9 0.65 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. figure 9. suggested fn package pcb layout ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 26 copyright 2012, taos inc. the lumenology company www.taosinc.com package information package cs six-lead chipscale 1750 500 bsc 1250 6 100 415 20 710 45 500 bsc 500 bsc 375 30 375 30 top view bottom view end view 6 210 30 pin out lead free pb 442 10 442 10 photodiode array bottom view sda 6 int 5 scl 4 1 v dd 2 addr sel 3 gnd 8 nominal c l of solder contacts c l of photodiode array area c l of solder contacts of photodiode array area c l 139 nominal pin 1 pin 1 notes: a. all linear dimensions are in micrometers. dimension tolerance is 25 m unless otherwise noted. b. solder bumps are formed of sn (96.5%), ag (3%), and cu (0.5%). c. the layer above the photodiode is glass and epoxy with an index of refraction of 1.53. d. this drawing is subject to change without notice. figure 10. package cs ? six-lead chipscale packaging configuration ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 27 the lumenology company copyright 2012, taos inc. www.taosinc.com package information package fn dual flat no-lead 203 8 442 10 650 bsc 650 50 6 sda 5 int 4 scl v dd 1 addr sel 2 gnd 3 top view side view bottom view lead fre e pb 300 50 2000 75 2000 75 pin 1 pin 1 end view pin out top view photo-active area 750 150 295 nominal 442 10 c l of solder contacts photodiode array area (note b) c l 140 nominal 20 nominal c l of solder contacts of photodiode array area (note b) c l notes: a. all linear dimensions are in micrometers. dimension tolerance is 20 m unless otherwise noted. b. the die is centered within the package within a tolerance of 75 m. c. package top surface is molded with an electrically nonconductive clear plastic compound having an index of refraction of 1.55 . d. contact finish is copper alloy a194 with pre-plated nipdau lead finish. e. this package contains no lead (pb). f. this drawing is subject to change without notice. figure 11. package fn ? dual flat no-lead packaging configuration ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 28 copyright 2012, taos inc. the lumenology company www.taosinc.com carrier tape and reel information top view detail b detail a 1.35 0.05 a o 1.85 0.05 b o 0.97 0.05 k o 0.250 0.02 5 max 5 max 4.00 8.00 3.50 0.05 1.50 4.00 2.00 0.05 + 0.30 ? 0.10 1.75 b b aa 0.60 0.05 notes: a. all linear dimensions are in millimeters. dimension tolerance is 0.10 mm unless otherwise noted. b. the dimensions on this drawing are for illustrative purposes only. dimensions of an actual carrier may vary slightly. c. symbols on drawing a o , b o , and k o are defined in ansi eia standard 481?b 2001. d. each reel is 178 millimeters in diameter and contains 3500 parts. e. taos packaging tape and reel conform to the requirements of eia standard 481?b. f. in accordance with eia standard, device pin 1 is located next to the sprocket holes in the tape. g. this drawing is subject to change without notice. figure 12. package cs carrier tape ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 29 the lumenology company copyright 2012, taos inc. www.taosinc.com carrier tape and reel information top view detail a 2.18 0.05 a o 0.254 0.02 5 max 4.00 8.00 3.50 0.05 1.50 4.00 2.00 0.05 + 0.30 ? 0.10 1.75 b b aa 1.00 0.25 detail b 2.18 0.05 b o 5 max 0.83 0.05 k o notes: h. all linear dimensions are in millimeters. dimension tolerance is 0.10 mm unless otherwise noted. i. the dimensions on this drawing are for illustrative purposes only. dimensions of an actual carrier may vary slightly. j. symbols on drawing a o , b o , and k o are defined in ansi eia standard 481?b 2001. k. each reel is 178 millimeters in diameter and contains 3500 parts. l. taos packaging tape and reel conform to the requirements of eia standard 481?b. m. in accordance with eia standard, device pin 1 is located next to the sprocket holes in the tape. n. this drawing is subject to change without notice. figure 13. package fn carrier tape ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 30 copyright 2012, taos inc. the lumenology company www.taosinc.com soldering information the package has been tested and have demonstrated an ability to be reflow soldered to a pcb substrate. the solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of pr oduct on a pcb. temperature is measured on top of component. the components should be limited to a maximum of three passes through this solder reflow profile. table 15. solder reflow profile parameter reference device average temperature gradient in preheating 2.5 c/sec soak time t soak 2 to 3 minutes time above 217 c (t1) t 1 max 60 sec time above 230 c (t2) t 2 max 50 sec time above t peak ?10 c (t3) t 3 max 10 sec peak temperature in reflow t peak 260 c (?0 c/+5 c) temperature gradient in cooling max ?5 c/sec t 3 t 2 t 1 t soak t 3 t 2 t 1 t peak not to scale ? for reference only time (sec) temperature ( c) figure 14. solder reflow profile graph ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 31 the lumenology company copyright 2012, taos inc. www.taosinc.com storage information moisture sensitivity optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package molding compound. to ensure the package molding compound contains the smallest amount of absorbed moisture possible, each device is dry-baked prior to being packed for shipping. devices are packed in a sealed aluminized envelope with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. cs package the cs package has been assigned a moisture sensitivity level of msl 2 and the devices should be stored under the following conditions: temperature range 5 c to 50 c relative humidity 60% maximum floor life 1 year out of bag at ambient < 30 c / 60% rh rebaking w ill be required if the aluminized envelope has been open for more than 1 year. if rebaking is required, it should be done at 50 c for 12 hours. fn package the fn package has been assigned a moisture sensitivity level of msl 3 and the devices should be stored under the following conditions: temperature range 5 c to 50 c relative humidity 60% maximum total time 12 months from the date code on the aluminized envelope ? if unopened opened time 168 hours or fewer rebaking w ill be required if the devices have been stored unopened for more than 12 months or if the aluminized envelope has been open for more than 168 hours. if rebaking is required, it should be done at 50 c for 12 hours. ams ag technical content still valid
tsl2581, TSL2583 light-to-digital converter taos134a ? july 2012 32 copyright 2012, taos inc. the lumenology company www.taosinc.com production data ? information in this document is current at publication date. products conform to specifications in accordance with the terms of texas advanced optoelectronic solutions, inc. standard warranty. production processing does not necessarily include testing of all parameters. lead-free (pb-free) and green statement pb-free (rohs) taos? terms lead-free or pb-free mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, taos pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br) taos defines green to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material). important information and disclaimer the information provided in this statement represents taos? knowledge and belief as of the date that it is provided. taos bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. taos has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. taos and taos suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. notice texas advanced optoelectronic solutions, inc. (t aos) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. customers are advised to contact taos to obtain the latest product information before placing orders or designing taos products into systems. taos assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. taos further makes no claim as to the suitability of its products for any particu lar purpose, nor does taos assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. texas advanced optoelectronic solutions, inc. products are not designed or intended for use in critical applications in which the failure or malfunction of the taos product may result in personal injury or death. use of t aos products in life support systems is expressly unauthorized and any such use by a customer is completely at the customer?s risk. lumenology, taos, the taos logo, and texas advanced optoelectronic solutions are registered trademarks of texas advanced optoelectronic solutions incorporated. ams ag technical content still valid

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